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this is information on a product in full production. august 2013 docid025099 rev 1 1/23 stef033 electronic fuse for 3.3 v line datasheet - production data features ? continuous current typ.: 3.6 a (dfn), 2 a (csp) ? n-channel on resistance (typ): 40 mw ? enable/fault functions ? output clamp voltage (typ): 4.5 v ? undervoltage lockout ? short-circuit limit ? overload current limit ? controlled output voltage ramp ? thermal latch (typ): 160 c ? uses tiny capacitors ? latching and auto-retry versions ? operative junction temp. - 40 c to 125 c ? available in dfn10 3x3 and flip chip 9 bumps applications ? hard disk drives ? solid state drives (ssd) ? hard disk and ssd arrays ? computer ? dvd and blu-ray disc drivers description the stef033 is an integrated electronic fuse optimized for monitoring output current and the input voltage. connected in series to the 3.3 v rail, it is able to protect the electronic circuitry on its output from overcurrent and overvoltage. the stef033 has controlled delay and turn-on time. when an overload condition occurs, the device limits the output current to a predefined safe value. if the anomalous overload condition persists, it goes into an open state, disconnecting the load from the power supply. if a continuous short-circuit is present on the board, when the power is re-applied the e- fuse initially limits the output current to a sa fe value and then goes again into the open state. the voltage clamping circuit prevents the output voltage from exceeding a fixed value, if the input voltage goes beyond this threshold. the device is equipped with a thermal protection circuit. intervention of thermal protection is signaled to the board-monitoring circuits through an appropriate signal on the fault pin. unlike mechanical fuses, which must be physically replaced after a single event, the e- fuse does not degrade in its performances following short-circuit/thermal protection intervention and is reset either by re-cycling the supply voltage or using the appropriate enable pin. the stef033 is also available in an auto- retry version; in case of thermal fault it automatically attempts to re-apply power to the load when the die temperature returns to a safe value. dfn10 (3 x 3 mm) flip chip 9 www.st.com
contents stef033 2/23 docid025099 rev 1 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1.1 turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1.2 normal operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1.3 output voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1.4 current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1.5 thermal shutdown and auto-retry function . . . . . . . . . . . . . . . . . . . . . . . 9 5.2 r limit calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.3 c dv/dt calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.4 enable-fault pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid025099 rev 1 3/23 stef033 device block diagram 23 1 device block diagram figure 1. stef033 block diagram
pin configuration stef033 4/23 docid025099 rev 1 2 pin configuration figure 2. pin configuration (top view) v cc source source source source source gnd dv /dt en/fault i-lim - am17207v1 i-lim + am17208v1 c b a 12 3 dfn flip-chip table 1. in description in n (dfn) in n (cs) smbol note 1,2,3,4,5 c1,c2,c3 v out /source connected to the source of the inte rnal power mosfet and to the output terminal of the fuse 6 a1 i-lim + a resistor between these two pins sets the overload and short-circuit current limit levels. on the csp the resistor must be connected between the i-lim+ and source pins 7 n.c. i-lim - 8 a2 en/fault the enable/fault pin is a tri-state, bi-directional interface. during normal operation the pin must be left floatin g, or it can be used to disable the output of the device by pulling it to ground using an open drain or open collector device. if a thermal fault occu rs, the voltage on this pin goes into an intermediate state to signal a moni tor circuit that the device is in thermal shutdown. it can be connected to another device of this family to cause a simultaneous shutdown during thermal events. 9n.c.dv/dt the internal dv/dt circuit controls t he slew rate of the output voltage at turn-on. the internal capacitor allows a ramp-up time of around 1.4 ms. an external capacitor can be added to this pin to increase the ramp time. if an additional capacitor is not required, this pin should be left open. this feature is not available on the csp version. 10 a3 gnd ground pin exposed pad b1,b2,b3 v cc exposed pad. positive input voltage must be connected to v cc .
docid025099 rev 1 5/23 stef033 maximum ratings 23 3 maximum ratings note: absolute maximum ratings ar e those values beyond which damage to the device may occur. functional operation under these conditions is not implied. table 2. absolute maximum ratings symbol parame ter value unit v cc positive power supply voltage - 0.3 to 10 v v out /source v out pin voltage - 0.3 to 7 v v out pin voltage (100 ms) - 0.3 to vcc+0.3 i-lim+/i-lim- current limit pin voltage -0.3 to 7 v current limit pin voltage (100 ms) - 0.3 to v cc +0.3 en/fault enable/fault pin voltage - 0.3 to 4.6 v dv/dt dv/dt pin voltage - 0.3 to 4.6 v t op operating junction temperature range (1) 1. the thermal limit is set above the maximum thermal rating. it is not recommended to operate the device at temperatures greater than the maximu m ratings for extended periods of time. - 40 to 125 c t stg storage temperature range - 65 to 150 c t lead lead temperature (soldering) 10 sec 260 c table 3. recommended operating condition symbol parameter value unit v cc positive power supply voltage 3.1 to 8 v r-limit current limitation resistor rang e, stef033, stef033a 10 to 120 ? current limitation resistor range, stef033j, stef033ja 15 to 120 c dv/dt soft-start capacitor range 0 to 1 nf v en enable/fault pin voltage 0 to 3.6 v table 4. thermal data symbol parameter value unit r thja thermal resistance junction-ambient, dfn10 70 c/w thermal resistance junction-ambient, csp9 90 r thjc thermal resistance junction-case, dfn10 34 table 5. esd performance symbol parameter test conditions value unit esd esd protection hbm 4 kv mm 400 v cdm 500 v
electrical characteristics stef033 6/23 docid025099 rev 1 4 electrical characteristics v cc = 3.3 v, c i = 10 f, c o =10 f, t j = 25c (unless otherwise specified) table 6. electrical characteristics for stef033 symbol parameter test conditions min. typ. max. unit under/over voltage protection v clamp output clamping voltage v cc = 8 v 4 4.5 5 v v uvlo under voltage lockout turn-on, voltage increasing 2.15 2.35 2.5 v v hyst uvlo hysteresis 0.1 v power mosfet t dly delay time enabling of chip to v out =10% of nominal value. 500 s r dson on resistance (1) 40 60 m ? -40c docid025099 rev 1 7/23 stef033 electrical characteristics 23 v min minimum operating voltage 2 v thermal latch tsd shutdown temperature (2) 160 c hysteresis only on stef033axx (2) 25 1. pulse test: pulse width = 300 s, duty cycle = 2% 2. guaranteed by design, but not tested in production table 6. electrical character istics for stef033 (continued) symbol parameter test conditions min. typ. max. unit
typical application stef033 8/23 docid025099 rev 1 5 typical application figure 3. application ci rcuit, stef033 and stef033a (dfn10 package) figure 4. application circui t, stef033j and stef033ja (flip-chip 9 bump package) 5.1 operating modes 5.1.1 turn-on when the input voltage is applied, the enable/fault pin goes up to the high state, enabling the internal control circuitry. after an initial delay time of typically 500 ms, the output voltage is supplied with a slope defined by the internal dv/dt circuitry. if no a dditional capacitor is conne cted to dv/dt pin, the total time from the enable signal going high and the output voltage reaching the nominal value is around 1.6 ms (refer to figure 4 , and figure 14 ).
docid025099 rev 1 9/23 stef033 typical application 23 5.1.2 normal operating condition the stef033 e-fuse behaves like a mechanical fuse, buffering the circuitry on its output with the same voltage shown at its input, wit h a small voltage fall due to the n-channel mosfet r dson . 5.1.3 output voltage clamp this internal protection circuit clamps the outp ut voltage to a maximum safe value, typically 4.5 v, if the input voltage exceeds this threshold. 5.1.4 current limiting when an overload event occurs, the current limit ing circuit reduces the conductivity of the power mosfet, in order to clamp the output current at the value selected externally by means of the limiting resistor r limit ( figure 2 ). 5.1.5 thermal shutdown and auto-retry function if the device temperature exceeds the thermal la tch threshold, typically 160 c, the thermal shutdown circuitry turns the power mosfet off, thus disconnecting the load. the en/fault pin of the device is automatically set to an intermediate voltage, in order to signal the overtemperature event. the stef033 latch version can be reset from th is condition either by cycling the supply voltage or by pulling down the en pin below the v il threshold and then releasing it. on the stef033a auto-r etry version, the powe r mosfet will remain in an off state until the die temperature drops below the hysteresis value. once this happens, the internal auto- retry circuit attempts to reset the device, pulling up the en/fault pin to the operative value. 5.2 r limit calculation as shown in figure 2 , and figure 3 the device uses an internal n-channel sense fet with a fixed ratio, to monitor the output current and limit it at the level set by the user. the r limit value for achieving the requested current limitation can be estimated by using the ?current limit vs r limit ?, graph in figure 12 . the device has two levels of current limit ation, depending on the load condition. the short-circuit current limit (i short ) is the current level that is imposed when the output voltage decreases sharply, as in the case of a short-circuit on the output. the overload current limit (i lim ), also described as ?current limit trip-point?, represents the current level that is recognized by the device as an overload condition. following this, the current limit trip point is reached the device enters into current limitation, and the current to the load is limited to the i short value, which is generally lo wer than the trip-point value. the overload cu rrent limit (i lim ) is dependent on the device reaction time, so it is influenced by the load current slew-rate. the faster the current increase, the higher the current limit trip point.
typical application stef033 10/23 docid025099 rev 1 5.3 c dv/dt calculation the device includes a rise-time control circuit, allowing the soft-start during turn-on and hot- plug of the equipment. the pre-programmed rise time, defined as the time interval during which the output voltage goes from 10% to 90% of the nominal voltage, is typically 1.4 ms. the stef033 and stef033a in dfn10 package feature a user-programmable output voltage ramp-up time; by connecting a capacitor between the c dv/dt pin and gnd, modification of the output voltage ramp-up time is possible. the capacitance to be added on the c dv/dt pin can be selected using the following table. figure 5. delay time and v out rise time 5.4 enable-fault pin the enable/fault pin has the dual function of controlling the outp ut of the device and, at the same time, of providing information about the device status to the application. it can be connected to an external open-drain or open-collector device. in this case, when it is pulled at low logic level, it will turn the output of the e-fuse off. if this pin is left floating, since it has internal pu ll-up circuitry, the output of the e-fuse is kept on in normal operating conditions. this pin should never be biased to a voltage higher than 3.6 v. in case of thermal fault, the pin is pulled to an intermediate state ( figure 5 ). this signal can be provided to a monitor circuit, signaling that a thermal shutdown has occurred, or it can be table 7. typical rise time values vs. dv/dt capacitor c dv/dt none 100 pf 470 pf 1 nf rise time (1) [ms] 1. v cc = 3.3 v, c in = 10 f, c out = 10 f, r limit = 24 ??? i out = 1 a 1.4 2.8 8 16 10% 90% rise time delay time enable v out
docid025099 rev 1 11/23 stef033 typical application 23 directly connected to the enable/fault pins of other stefxx devices on the same application, in order to achieve a simultaneous enable/disable feature. when a thermal fault occurs, the device can be reset either by cycling the supply voltage or by pulling down the en able pin below the v il threshold and then releasing it. figure 6. enable/fault pin status am17209v1 en/fault voltage [v] time 0 1 2 3 4 5 normal operating condition thermal fault condition off/reset
typical performance characteristics stef033 12/23 docid025099 rev 1 6 typical performance characteristics the following plots are referred to the typical application circuit and, unless otherwise noted, at t a = 25 c. figure 7. clamping voltage vs. temperature fi gure 8. short-circuit current vs. temperature figure 9. bias current vs. temperature (device operational) figure 10. bias current vs. temperature (device disabled) figure 11. on resistance vs. temperature figure 12. current limit vs. r limit ( i out ramp ) am17210v1 0 1 2 3 4 5 6 7 8 -40 -25 0 25 55 85 125 vclamp [v] temperature [oc] v cc = 6 v am17211v1 0 0.5 1 1.5 2 2.5 3 -40 -25 0 25 55 85 125 i short [a] temperature [c] v cc = 3.3 v, r- limit = 24 am17212v1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -40 -25 0 25 55 85 125 ibias [a] temperature [c] vcc = 3.3 v, v en = floating am17213v1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -40 -25 0 25 55 85 125 ibias [a] temperature [c] vcc = 3.3 v, v en = g nd am17214v1 0 10 20 30 40 50 60 70 -40 -20 0 20 40 60 80 100 120 140 rds -on [m ] temperature (c) iout 500 ma iout 1 a iout 2 a iout 4 a vcc = 3.3 v, r- limit = 5 am17215v1 0 1 2 3 4 5 6 0 20 40 60 80 100 120 140 limit & short current (a) external sensing resistor ( ) ishort ilimit
docid025099 rev 1 13/23 stef033 typical performance characteristics 23 figure 13. v out ramp-up vs. enable figure 14. v out ramp-up vs. enable v cc = 3,3 v, i out = 1 a, c in = c out = 10 f, r limit = 24 ? , no c dv/dt v cc = 3.3 v, i out = 1 a, c in = c out = 10 f, r limit = 24 ? , c dv/dt = 470 pf figure 15. v out turn-on vs. enable figure 16. v out turn-off vs. enable v cc = 3.3 v, c in = c out = 10 f, r limit = 24 ? , no c dv/dt , i out = 1 a, enable from gnd to floating v cc = 3.3 v, c in = c out = 10 f, r limit = 24 ? , no c dv/dt , i out = 1 a, enable from floating to gnd figure 17. startup (slow rising) figur e 18. startup and voltage clamp v cc = from 0 to 3.3 v, c in = c out = 10 f, r limit = 24 ? , no c dv/dt , i out = 1 a v cc = from 0 to 6 v, c in = c out = 10 f, r limit = 24 ? , no c dv/dt , i out = 1 a
typical performance characteristics stef033 14/23 docid025099 rev 1 figure 19. thermal latch from 2 a load to short- circuit figure 20. startup into output short-circuit v cc = from 0 to 3.3 v, c in = c out = 10 f, r limit = 24 ? , no c dv/dt , i out = 1 a v cc = from 0 to 3.3 v, c in = c out = 10 f, r limit = 24 ? , v out short to gnd figure 21. voltage clamp figure 22. trip and short current (i out ramp) v cc = from 3.3 to 6 v, c in = c out =10 f, r limit = 24 ? , i out = 1 a v cc = from 0 to 3.3 v, c in = c out = 10 f, r limit = 24 ?
docid025099 rev 1 15/23 stef033 package mechanical data 23 7 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. table 8. dfn10l (3 x 3 mm.) mechanical data dim. mm. min. typ. max. a 0.80 0.90 1.00 a1 0.02 0.05 a2 0.55 0.65 0.80 a3 0.20 b 0.18 0.25 0.30 d 2.85 3.00 3.15 d2 2.20 2.70 e 2.85 3.00 3.15 e2 1.40 1.75 e3 0.230 e4 0.365 e0.50 l 0.30 0.40 0.50 ddd 0.08
package mechanical data stef033 16/23 docid025099 rev 1 figure 23. dfn10l package outline 7426335_h
docid025099 rev 1 17/23 stef033 package mechanical data 23 table 9. flip-chip 9 bumps mechanical data dim. mm. min. typ. max. a 0.50 0.55 0.60 a1 0.17 0.20 0.23 a2 0.33 0.35 0.37 b 0.23 0.25 0.29 d 1.16 1.19 1.22 d1 0.8 e 1.16 1.19 1.22 e1 0.8 e0.40 f0.195 ccc 0.075
package mechanical data stef033 18/23 docid025099 rev 1 figure 24. flip-chip 9 bumps package outline 7224720_f
docid025099 rev 1 19/23 stef033 package mechanical data 23 dim. mm. inch. min. typ. max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t18.40.724 ao 3.3 0.130 bo 3.3 0.130 ko 1.1 0.043 po 4 0.157 p8 0.315 tape and reel qfnxx/dfnxx (3x3 mm) mechanical data
package mechanical data stef033 20/23 docid025099 rev 1 figure 25. dfn10l footprint - recommended data (dimensions in mm.) 7426335_h
docid025099 rev 1 21/23 stef033 order codes 23 8 order codes table 10. order codes tape and reel package version marking stef033pur dfn latch ef03 stef033jr (1) 1. available on request. flip-chip 9 latch 33 STEF033APUR dfn auto-retry ef03a stef033ajr (1) flip-chip 9 auto-retry 3a
revision history stef033 22/23 docid025099 rev 1 9 revision history table 11. document revision history date revision changes 06-aug-2013 1 initial release.
docid025099 rev 1 23/23 stef033 23 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not authorized for use in weapons. nor are st products designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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